Comparators are well known in the art. A comparator is a circuit which compares one input signal with at least another input signal and outputs a binary signal based on the result of the comparison. In the case of an analog comparator, the two or more input signals to be compared are generally analog in nature. What is meant here by an analog signal is one that can have one of a continuum of amplitude values at any given point in time. In many applications, it is desirable to provide a binary output signal indicating when an input signal is above or below a predefined reference level. In this scenario, a substantially fixed reference voltage is applied to one of the inputs of the comparator, and the other input of the comparator receives the input signal to be compared. The output signal generated by the comparator will be a binary signal representing whether the input signal is greater than or less than the reference voltage level.
Certain input/output (IO) interface applications, including, for example, gunning transistor logic (GTL), high-speed transceiver logic (HSTL), and series stub terminated logic (SSTL), require comparator circuits which are compatible with a wide range of input voltages (e.g., about 1.0 volt to about 3.3 volts). In such comparator circuits, it is also generally desirable to have a substantially low power dissipation and operate at high data rates (e.g., greater than about 1.0 gigabits per second) over a desired range of process, voltage and/or temperature (PVT) variations to which the comparator circuits may be subjected.
Conventionally, either a comparator circuit using all IO transistor devices and running off an IO supply voltage (e.g., 3.3 volts), or a comparator circuit employing all core transistor devices and running off a core supply voltage (e.g., 1.0 volt) has been used in IO interface applications. In this instance, IO devices have a substantially higher threshold voltage associated therewith compared to core devices. A comparator circuit employing all IO devices, however, typically has high power dissipation and lacks the ability to accept low input signal swings. This limits the applicability of such circuits to signaling levels that are typically greater than about 1.2 volts. On the other hand, a comparator circuit employing all core devices cannot accept high input signal swings without undesirably impacting reliability.
Accordingly, there exists a need for an improved comparator circuit for interfacing with a wide range of input signal levels and which does not suffer from one or more of the problems exhibited by conventional comparator circuits.